1. Field of the Invention
The present invention relates generally to semiconductor devices and, more particularly, to a semiconductor device for use with a CMOS (complementary metal oxide semiconductor) inverter or the like utilized in a peripheral circuit of an image sensor formed of CCD (charge-coupled device), MOS or the like, for example.
2. Description of the Prior Art
In general, a buffer circuit is connected to a peripheral circuit of an image sensor formed of CCD, MOS or the like. For example, the buffer circuit is connected to a path through which an output signal of an image sensor is supplied to a signal processing circuit of the succeeding stage. As such buffer circuit, there are employed an inverting amplifier such as a CMOS inverter or the like, a non-inverting amplifier such as a source follower circuit or the like and a differential amplifier, etc. In a logical unit of the peripheral circuit, there are employed an inverter, an NAND circuit, etc.
FIG. 1 of the accompanying drawings is a cross-sectional view showing a structure of an example of a conventional CMOS inverter. As shown in FIG. 1, on an N-type silicon substrate 11n, there are formed an N-channel type MOS field effect transistor (hereinafter simply referred to as an N-FET) Qn formed of an N-type source region 12S, a drain region 12D and a gate electrode 12G formed of a polycrystalline silicon layer or the like and a P-channel type MOS field effect transistor (hereinafter simply referred to as a P-FET) Qp formed of a P-type source region 13S, a drain region 13D and a gate electrode 13G formed of a polycrystalline silicon layer or the like.
In particular, under the N-FET (Qn), there is formed a P-type well region 14p that is used to separate the N-FET (Qn) and the silicon substrate 11n. The P-FET (Qp) is formed on the silicon substrate 11n as it is.
A substrate potential Vsub is applied to the silicon substrate 11n, a power source voltage Vdd is applied to a source region 13S of the P-FET (Qp), and a ground potential Vss is applied to a source region 12S and a well region 14p of the N-FET (Qn), respectively. An input signal is applied to a common terminal .phi.in connected to the two gate electrodes 12G and 12S so that an output signal (inverter output) is output from a common terminal .phi.out connected to the two drain regions 12D and 13D. In FIG. 1, a hatched region 11N formed near the rear surface of the substrate 11n represents a neutral region of the substrate 11p and a potential thereof is fixed to the substrate potential Vsub.
When a P-type substrate is employed as the silicon substrate, as shown in FIG. 2, the P-FET (Qp) is formed within an N-type well region 14n formed on the P-type silicon substrate 11p. The N-FET (Qn) is formed on the silicon substrate 11p as it is.
The image sensor formed of CCD, MOS or the like performs an operation in which signal charges within a light sensing unit are temporarily discharged to the substrate side (electronic shutter operation and reset operation).
When the image sensor carries out the electronic shutter operation, the substrate potential Vsub is changed. As shown in FIG. 1, for example, the P-FET (Qp) formed on the silicon substrate 11n is affected by a back-gate effect from the substrate 11n and a Vth is fluctuated. On the other hand, the N-FET (Qn) is not affected by the substrate potential Vsub because the potential of the neutral region 14N (shown hatched) of the well region 14p is fixed to the ground potential Vss.
If the Vth of the FET constructing the CMOS inverter is fluctuated, then an operation point of the CMOS inverter is changed. There is then the disadvantage that an output (output signal) of the inverter is inverted. As a result, a phase displacement relative to a pulse response such as an image sensor peripheral logic circuit, an analog circuit or the like and a malfunction will occur.
This is also true in the CMOS inverter shown in FIG. 2. In this case, the N-FET (Qn) that is formed on the silicon substrate 11p as it is affected by a back-gate effect from the substrate 11p. As a result, a Vth is fluctuated and the image sensor peripheral circuit, the analog circuit, etc., will malfunction.